An AI chip is not finished when the wafer leaves the fab. It still has to be joined to its memory on an interposer, mounted on a substrate, assembled and tested, and increasingly wired to optics. In October 2026, companies and reports pointed to constraints at the interposer, the substrate and in optics, and to new spending on assembly and test.
TrendForce said on 26 October that ABF substrates remain “one of the tightest links in the AI supply chain”, with lead times of 48 to 56 weeks against 12 weeks in a balanced market. By our arithmetic, that is 4 to about 4.7 times the normal wait.
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The key insight: TrendForce put ABF substrate lead times at 48 to 56 weeks against 12 in a balanced market, which by our arithmetic is 4 to about 4.7 times the normal wait, and Intel’s Q3 deck cites “current industry-wide substrate and memory shortages”.
Intel’s third-quarter earnings presentation of 29 October lists “EMIB-T Yield, Reliability and Supply”. EMIB is Intel’s packaging technology that joins chips with a small silicon bridge. The deck’s risk language cites “current industry-wide substrate and memory shortages”, and a separate slide reads “PC Market Challenged by Memory Shortages”.
On the call, chief executive Lip-Bu Tan said the data centre unit would have done better without shortages of some raw materials and a factory shutdown in Israel, The Next Web reported, citing Bloomberg. A post on X by @firesidealpha quoting the call attributes to Tan a line about an industry-wide shortage of advanced organic substrates for Intel’s EMIB packaging. Our Intel piece has the quarter.
Chief financial officer David Zinsner told Reuters the blast at the Kiryat Gat fab would cut fourth-quarter revenue by roughly $300 million, with a similar impact expected in the first quarter, about $600 million over two quarters.
The AI chip packaging chain, with one reported figure at each stage: the blast at Intel’s Israel fab (about $600 million over two quarters, Zinsner to Reuters); CoWoS capacity estimates (analysts cited by Commercial Times); ABF lead times of 48-56 weeks vs 12 (TrendForce); Powertech’s $400 million panel venture and Amkor’s ~$2.5 billion capex; SPIL’s 15x optical-engine plan (SDxCentral).
Stage One: The Interposer
TSMC’s CoWoS is the packaging that joins AI chips such as Nvidia’s to their high-bandwidth memory on a silicon interposer. On TSMC’s third-quarter call on 15 October, chief executive C.C. Wei said: “Definitely, we have a little bit shortage on the back end”. Our packaging-squeeze piece has the context.
Taiwan’s Commercial Times reported on 26 October that foundry and packaging companies expect a new CoWoS price adjustment of 10% to 20%, and that some packaging lead times have already lengthened. Analysts cited in the report put CoWoS monthly capacity at more than 130,000 wafers in 2026, with 200,000 targeted in 2027. By our arithmetic, that target is about 54% above the 2026 figure. TSMC has not confirmed any price change. Our CoWoS pricing piece has the detail.
Commercial Times also reported on 29 October that TSMC and Xintec are nearing a deal for two AUO display plants for advanced packaging, in a transaction the paper says may exceed NT$20 billion. No deal has been announced. Our AUO piece covers it.
Stage Two: The Substrate
The interposer sits on an organic substrate, usually built on ABF film. TrendForce said ABF substrates remain “one of the tightest links in the AI supply chain”, with lead times of 48 to 56 weeks against 12 weeks in a balanced market and “little near-term relief”.
Maeil Business Newspaper reported that Tesla and Nvidia will put about $2.8 billion into Samsung Electro-Mechanics for AI substrate lines, and press reports put substrate prepayments for Intel, Nvidia and AMD at more than NT$100 billion. Some Samsung Electro-Mechanics capacitors carry a 61-week standard lead time at DigiKey, Newspim reported.
Stage Three: Assembly and Test
Taiwan’s investment commission on 28 October approved Powertech Technology’s US$400 million investment in XCIP Technologies, a Singapore joint venture with Broadcom for panel-level advanced packaging, assembly and final testing, according to Economic Daily News and United Daily News. By our arithmetic, that is about 26% of Powertech’s NT$50 billion 2026 capital spending plan. Our Powertech piece has the terms.
Amkor, the largest US-headquartered outsourced packaging and test company, said full-year 2026 capital expenditures are now expected to be approximately $2.5 billion, and its Computing end market rose to 26% of sales. Our Amkor piece has the quarter.
Stage Four: Optics
Nvidia is working with SPIL to expand manufacturing capacity 15 times for optical engines used in co-packaged optics by mid-2027, SDxCentral reported from GTC Berlin, with Nvidia aiming “for another doubling” by the end of 2028. The same report quoted Nvidia chief executive Jensen Huang: “Capacity is the constraint.” Our SPIL piece has the detail.
The Adjacent Shortage: Memory
Memory is the other input around the chip. Sandisk reported revenue of $11.0 billion and a GAAP gross margin of 85.0%, with datacenter revenue of $4.80 billion, up 61% in a quarter. Samsung’s chips earned 99% of its record 107.4 trillion won profit. Our Sandisk piece and our Samsung piece have the numbers.
The Structural Read
As we read the sources, the reported constraints sit after the wafer as well as in it: TSMC’s chief executive said there is a little bit of shortage on the back end, and Intel’s deck lists EMIB-T supply among its foundry items.
As we read the coverage, the responses differ by stage: reported price rises and plant purchases at the interposer, reported prepayments and new lines at the substrate, and new ventures and capex at assembly and test.
By our arithmetic, the analysts’ 2027 CoWoS target cited by Commercial Times is about 54% above their 2026 estimate; TSMC has not disclosed these figures.
TrendForce, Weekly Radar, 26 October 2026
“one of the tightest links in the AI supply chain”
Three Implications
FOR AI CHIP BUYERS Commercial Times reported that foundry and packaging firms expect CoWoS quotes to rise 10% to 20%; TSMC has not confirmed any change.
FOR PACKAGING SUPPLIERS Powertech’s US$400 million Broadcom venture and Amkor’s approximately $2.5 billion 2026 capex are the spending figures the companies and reports gave.
FOR INVESTORS The CoWoS capacity figures are analysts’ estimates and the substrate commitments are press reports, so the disclosed numbers are thinner than the reported ones.
The analysis puts it this way: “This entire ecosystem has been shaped by constraints, bottlenecks, chokepoints, and scarcity at every layer.”
As we read it, packaging is one of those layers: the reports in this piece describe waits and price rises between the wafer and the finished chip. The analysis does not discuss the October 2026 reports.
What Is Not Established
The CoWoS capacity figures are analysts’ estimates cited by Commercial Times, not TSMC disclosures, and the price rises are unconfirmed. The AUO deal is reported, not announced. The substrate commitments come from press reports. The Tan substrate line comes from a post on X quoting the call; Intel’s deck names substrate shortages in its risk language. The 4-to-4.7 times, 54% and 26% figures are our arithmetic.
This Week In The AI Supercycle
Execution Fault Lines, Concentrated Demand, and Geopolitical Firewalls
This week’s issue: the AI build is not short of demand for its parts. It is short of cheap money, and its end revenue rests on a narrow base of large, often venture-funded buyers.
Intel’s deck names industry-wide substrate and memory shortages, TSMC’s chief executive said there is a little bit of shortage on the back end, and TrendForce put ABF lead times at 48 to 56 weeks against 12 in a balanced market. Packaging companies are spending as well: Powertech’s US$400 million venture with Broadcom and Amkor’s roughly $2.5 billion of 2026 capex.
A note on sourcing. This analysis draws on Intel’s Q3 2026 earnings presentation and on our earlier reporting, which attributes Reuters, Commercial Times, TrendForce, SDxCentral, Economic Daily News, Maeil Business Newspaper, Newspim and company releases. CoWoS capacity figures are analysts’ estimates. The 4-to-4.7 times, 54% and 26% figures are our arithmetic.
Gennaro Cuofano is a CRO and tech executive who has worked in AI since late 2015, starting with bringing NLP, natural-language generation, voice and chatbot products to the marketing industry. His background is in law and finance: he holds a Master's degree in Law and an International MBA with an emphasis on corporate finance (LUISS Business School and the University of San Diego, 2012), and worked as a financial analyst at a real-estate investment firm in San Diego and as an assistant controller. His work focuses on business model strategy, business engineering and, more broadly, structural analysis: how companies make money, read from their own filings. He created FourWeekMBA and leads research there and at The Business Engineer, his newsletter on AI and business strategy, with over 95,000 subscribers and more than 1,000 published analyses. His writing has also appeared on Entrepreneur (for example, How to Digitize a Family Business in Europe) and HackerNoon. Find him on LinkedIn and Substack. See how we source.
