Nvidia is “providing billions of dollars in financing to expand CoWoS packaging capacity at Siliconware Precision Industries, or SPIL”, a unit of Taiwan’s ASE Technology, Reuters reported on 6 November (Reuters), citing an industry executive familiar with the matter who spoke anonymously.
The executive said the funding will support new factory space and equipment, and Reuters wrote that “the scale of the support has not previously been reported”. Nvidia did not respond to Reuters’ request for comment; ASE said it “does not comment on market rumours involving its customers”.
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The key insight: Reuters reported on 6 November that Nvidia is providing billions of dollars in financing to expand CoWoS packaging capacity at ASE’s SPIL, citing an anonymous industry executive; Nvidia did not respond to a request for comment, and Yole Group expects advanced-packaging capital spending to near $28 billion in 2026.
The report sits inside a broader Reuters feature on advanced packaging, based on interviews with more than a dozen industry executives and analysts. CoWoS, or chip-on-wafer-on-substrate, links separate pieces of silicon such as processors and memory on a shared base so they can work together at high speed.
Reuters wrote that TSMC leads the most sophisticated packaging, including CoWoS, and that “TSMC’s capacity limits have spurred some chip designers to seek additional supply”. Reuters gave Nvidia’s SPIL financing as an example, citing the executive.
Advanced-packaging money as reported by Reuters on 6 November 2026: Yole Group’s forecast of nearly $28 billion of 2026 capital spending, AMD’s more-than-$10 billion Taiwan investments and Powertech’s $400 million joint venture with Broadcom. Nvidia’s SPIL financing was reported only as billions of dollars. The 36% comparison is ours.
The Wider Packaging Race
Reuters cited research firm Yole Group: revenue from advanced packaging is forecast to overtake revenue from traditional packaging for the first time in 2026, with capital spending on the technology expected to near $28 billion.
AMD has unveiled investments of more than $10 billion across Taiwan’s semiconductor industry, including partnerships with ASE, SPIL and Powertech on advanced packaging, Reuters wrote. Powertech plans to invest $400 million in an advanced packaging joint venture with Broadcom in Singapore, with production that could begin in 2028, its chairman said.
TSMC is developing a panel-based technology called CoPoS; Reuters wrote that in April it said it had built a pilot line and expected production within a couple of years, but CoWoS remains its main AI-packaging technology.
What the Executives Said
Former Intel chief executive Pat Gelsinger, now a partner at Playground Global, said: “Packaging was always that thing that you just didn’t worry about”. Reuters wrote that he estimated advanced packaging could eventually account for as much as half the value of a chip product.
AMD chief executive Lisa Su told Reuters in October: “And yes, we do need more capacity overall”. Powertech chairman D K Tsai said: “Everyone is looking for a solution outside TSMC”.
Our Numbers
Against Yole’s forecast of nearly $28 billion of 2026 advanced-packaging capital spending, AMD’s more-than-$10 billion Taiwan pledge equals more than a third, about 36% (our arithmetic), although Reuters describes the AMD pledge as spanning Taiwan’s semiconductor industry, not packaging alone. Powertech’s $400 million Broadcom joint venture is about 1.4% of the Yole figure (our arithmetic).
Reuters gave no dollar figure for Nvidia’s financing beyond “billions of dollars”, so the share of the Yole total it represents cannot be computed.
Connecting the Coverage
Nvidia and SPIL had already planned a 15-fold rise in optical-engine capacity by mid-2027 (our piece), a separate project. We tracked the bottleneck’s numbers across CoWoS, EMIB and ABF (our piece) and Nvidia’s packaging squeeze, with $2.8 billion lines and 61-week waits (our piece). Intel’s two substrate supply deals need up to $6.1 billion of funding (our piece).
Upstream, TSMC is said to be weighing 3D DRAM for Nvidia (our piece) and HBM prices were seen up 121% (our piece).
The Structural Read
As we read the report, the money is going around the constraint rather than through it: Reuters wrote that TSMC’s capacity limits have spurred some chip designers to seek additional supply.
As we read the figures Reuters gave, chip designers are now funding packaging directly: AMD’s more-than-$10 billion Taiwan pledge equals about 36% of Yole’s 2026 forecast, by our arithmetic, though it spans more than packaging.
As we read what is missing, the Nvidia amount, terms and timing are not reported, so the size of the SPIL commitment cannot be set against Yole’s total.
Lisa Su, AMD chief executive, to Reuters
“I think CoWoS and advanced packaging are super important for our high-performance computing going forward”
Three Implications
FOR TSMC Reuters wrote that CoWoS remains TSMC’s main AI-packaging technology and that it said in April it had built a pilot line for its panel-based CoPoS.
FOR SPIL AND ASE ASE said it does not comment on market rumours involving its customers, and Reuters reported no amount or capacity figure for the financing.
FOR OTHER SUPPLIERS Powertech plans to invest $400 million in an advanced packaging joint venture with Broadcom in Singapore, with production that could begin in 2028, its chairman said.
The analysis says of its Foundries & Packaging layer: “Allocation power at the foundry is now more consequential than chip design itself.”
As we read it, a chip designer financing a packaging supplier’s capacity, as Reuters reported, is one way to buy into that allocation. The analysis does not discuss SPIL or this report.
What Is Not Established
The financing rests on one anonymous industry executive quoted by Reuters. Neither Nvidia nor ASE confirmed it: Nvidia did not respond to a request for comment, and ASE said it does not comment on market rumours involving its customers. Reuters did not report the amount, the terms, the timing or the capacity it would add, and we have not found a Taiwanese-media or company source with more detail.
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Reuters reported that Nvidia is providing billions of dollars to expand CoWoS packaging capacity at ASE’s SPIL, citing an anonymous industry executive; Nvidia did not respond to a request for comment, and ASE said it does not comment on market rumours involving its customers. The report puts Nvidia alongside AMD’s more-than-$10 billion Taiwan pledge in a market where Yole expects advanced-packaging capital spending to near $28 billion this year.
A note on sourcing. The Nvidia financing, the Yole, AMD and Powertech figures and the executives’ quotes come from Reuters’ 6 November report, linked in the text; the financing rests on one anonymous industry executive and was not confirmed by Nvidia or ASE. The percentages are our arithmetic. This is not investment advice.
Gennaro Cuofano is a CRO and tech executive who has worked in AI since late 2015, starting with bringing NLP, natural-language generation, voice and chatbot products to the marketing industry. His background is in law and finance: he holds a Master's degree in Law and an International MBA with an emphasis on corporate finance (LUISS Business School and the University of San Diego, 2012), and worked as a financial analyst at a real-estate investment firm in San Diego and as an assistant controller. His work focuses on business model strategy, business engineering and, more broadly, structural analysis: how companies make money, read from their own filings. He created FourWeekMBA and leads research there and at The Business Engineer, his newsletter on AI and business strategy, with over 95,000 subscribers and more than 1,000 published analyses. His writing has also appeared on Entrepreneur (for example, How to Digitize a Family Business in Europe) and HackerNoon. Find him on LinkedIn and Substack. See how we source.
