Intel CTO: Chip Tools Let Intel Double Wafer Output, Not 10x

Intel’s chief technology officer, Pushkar Ranade, says the world’s stock of chipmaking tools would let Intel roughly double its leading-edge wafer output, but not raise it tenfold. In an interview published on the Dwarkesh Podcast on 22 October 2026, Dwarkesh Patel asked whether there were enough tools in the world to 10X the wafers Intel produces at the leading edge. Ranade answered: “Not 10X, but probably 2X, yes.”

The episode, ‘What will computer chips look like in 2045?’, was recorded during a two-day tour of Intel’s most advanced fab, Patel writes. It also includes Intel engineers Chris Auth, Jack Kavalieros, Kevin Fischer and Tyler Osborn. Patel sets the answer against AI demand, writing that AI compute has grown 3x a year for the last decade.

What the CTO Said About Supply

• Tools are the limit. Asked about ASML’s EUV machines, Ranade said: “It is a limiter. We have to make the most of the capacity that we already have installed.” Ranade added that EUV is not the only bottleneck and that “we’re seeing all equipment seeing tremendous supply shortage.”
• Locked to one supplier. Once a process such as 18A is set, Ranade said, “we need a specific tool. We can’t just go and get a different tool for the same process.”
• The whole chain. When Patel said the 3x-a-year pace of AI compute could not continue on that basis, Ranade replied: “Unless the entire supply chain — starting from the equipment suppliers, their suppliers, their sub-suppliers — unless everybody produces more, you can’t increase the output.”
• The timeline. “Let’s say you place an enormous order for tools today, and you’re looking at 18 months to get those tools. You’re already into basically ’28,” Ranade said. With a new building on top, “you’re basically looking at the end of the decade.”

Source: Dwarkesh Podcast, ‘What will computer chips look like in 2045?’, transcript published 22 October 2026. The figures attributed to Patel come from reports linked in the transcript.

Memory, TSMC and Capital Spending

Ranade said the shortage is worse in memory. “I would argue that the supply crunch is larger for memory today than it is for compute,” Ranade said. Asked about Intel’s past sales of its DRAM and flash businesses, Ranade said: “Clearly, in hindsight, probably not the smartest time to sell off a flash memory business.”

On TSMC, Ranade separated scale from technology. “Catching up in scale will be a gradual process,” Ranade said, and on technology alone: “I think we’re already there.” When Patel cited SemiAnalysis figures suggesting 14A’s transistor density would be comparable to TSMC’s N2, Ranade said: “First of all, I would dispute your benchmarking.”

Patel put TSMC’s capital spending this year at around $50 billion and Intel’s at around $20 billion. Ranade called it an unfair comparison because TSMC is a foundry for nearly everyone while Intel is largely a foundry for itself. “We’ll become a foundry for others. In due course, our CapEx will also grow,” Ranade said.

14A and Terafab

Chris Auth, who Patel says leads development of the processes now in manufacturing, said 14A has been in development for about three-plus years. “Right now, we’re getting very close to where we’re finalizing the process,” Auth said. On ASML’s newer High-NA EUV machines, Auth said: “Now at 14A, we’ve left it as an option, and it’s something that we’ll have a discussion with the customer on.”

On Terafab, the fab project Elon Musk has described, Ranade said Musk had concluded that Musk’s own businesses would need a lot of silicon. “But unlike building a car, for example, this is such an intricate and complicated process that we thought we could work together to help accelerate his bringing up his fab,” Ranade said, adding that a fab also needs power, water, consumables and “a lot more raw fab space, raw clean room capacity.”

Why It Matters for AI Buyers

Patel summarised the takeaway as production that can rise quickly within about 12 months but only by a limited amount by the end of the decade, and asked whether that was right. Ranade answered: “Unless the entire supply chain ramps up production very quickly.” For companies planning AI capacity, the CTO’s answer puts the constraint in tool supply and lead times, not only in money.

Connecting the Coverage

Our Terafab piece reported in August that the planned Texas fab was an announced first phase, with $16.8 billion of funding committed for that phase. Our memory contracts piece reported on 19 October that Micron and Sandisk had about $225 billion of memory sales under contract, by our arithmetic from their filings and calls. What’s new: Intel’s CTO says the supply crunch is larger for memory than for compute, and puts a number on how far tools allow Intel’s leading-edge output to grow.

The Structural Read

As we read it, the answer separates money from capacity: asked what limits Intel’s wafer output even with unlimited capital spending, Ranade pointed to the existing fleet of tools and said that getting every 1% extra yield is extremely hard because the process is already finely tuned.

As we read it, the lead time is the planning variable: Ranade said an enormous tool order placed today means about 18 months of waiting, and that building a new fab on top of that takes it to basically the end of the decade.

As we read it, the memory line points to a second constraint: Ranade said “the supply crunch is larger for memory today than it is for compute,” which matches the long-term memory contracts in our 19 October piece.

Three Implications

FOR AI BUYERS Ranade said tools are a limiter and that “all equipment” is seeing tremendous supply shortage; as we read it, chip capacity for the next 18 months is largely set by tools already installed or on order.

FOR INTEL’S FOUNDRY PITCH Ranade said Intel will become a foundry for others and that its capital spending will grow in due course; Auth said High-NA EUV at 14A is an option discussed customer by customer.

FOR MEMORY MAKERS Ranade said the world will eat up as much memory as can possibly be made and that the crunch is larger for memory than for compute.

The Business Engineer Lens

This story maps onto the Business Engineer framework The AI Memory Chokepoint.

The framework argues: “Memory is becoming the new compute. HBM growth is outpacing accelerator demand, making memory the rate-limiting factor in the AI scaling equation.”

As we read it, Intel’s CTO makes a related point from the foundry side: Ranade said the supply crunch is larger for memory than for compute, while tools cap how far leading-edge logic output can grow. The framework was published in December 2025 and does not discuss this interview.

What Is Not Established

The 2X answer was a spoken, rough estimate in a podcast interview, not company guidance, and it was about Intel’s own leading-edge output. Ranade did not give a timeframe for it in the passage we read. The capital-spending and AI-compute figures are Patel’s, from reports linked in the transcript. We read the transcript on dwarkesh.com and did not contact Intel. Nothing here is investment advice.

The Bottom Line

Intel’s CTO says the tools that exist would let Intel roughly double its leading-edge wafers, not multiply them tenfold, and that new tools ordered today take about 18 months to arrive. The CTO also says the supply crunch is larger for memory than for compute.