AMD’s MI350X delivered higher training throughput than Nvidia’s B200 on 4 of 10 Meta production recommendation models and lower throughput on the other 6, according to the results table in a paper by Meta and AMD engineers posted to arXiv on 15 October. The paper reports a geometric mean of 101.2% for MI350X relative to B200.
By our arithmetic, the per-model ratios run from 82% to 130%, a spread of 48 percentage points around that average. The paper also says AI agents now port and tune much of the code that kept Meta’s workloads tied to Nvidia’s CUDA software.
Business Pill · GPUS
A short Business Engineer explainer on GPUs. It teaches the general idea only and does not discuss the Meta paper.
The key insight: The paper by Meta and AMD engineers reports a 101.2% geometric mean for MI350X against B200 across ten production recommendation models, but by our count MI350X was faster on 4 of the 10 and slower on 6, with ratios from 82% to 130%; the average describes the fleet, not any single model.
What the Paper Measured
The paper describes itself as “the first hyperscaler report on productionizing AMD GPUs for large-scale training”. Its Table III compares ten representative production workloads on MI350X and B200 using matched batch sizes, from 8 GPUs to 128 GPUs.
MI350X ran faster on Models B (114%), C (121%), I (102%) and J (130%), the table shows. It ran slower on Models A (82%), D (98%), E (94%), F (92%), G (92%) and H (96%). The 4-of-10 split is our count from that table.
The authors say the B200 baseline “is not a strawman”, because the incumbent “has received equal or greater optimization than the MI350X”. They add that MI350X’s GEMM performance “remains an area for improvement”.

What Was Posted on X
On 30 October, LiDaosen pointed to Meta’s production data-center paper comparing AMD’s MI350X with Nvidia’s B200, arguing that automated AI agents are dismantling the CUDA porting moat but that the headline parity came under severe thermal constraints. Both readings are the poster’s; this piece reports the paper’s own figures.
Agents as the Porting Crew
The paper says “The emergence of agentic AI tools has fundamentally lowered the cost of switching from NVIDIA to AMD”. At Meta, it says, agents “iteratively compile code, interpret error messages, and apply fixes until the build succeeds”, and can generate custom shims when a CUDA library has no ROCm equivalent.
For a long tail of custom kernels, the authors built an agentic workflow on Meta’s KernelEvolve framework that encodes tuning rules as skills. Applied to dozens of production Triton kernels, the paper says it “yields a success rate exceeding 80%”, with “near-expert performance while reducing development time by an order of magnitude”.
Its case study is a jagged flash attention kernel that ran twice as slow on MI350X as on B200 in its backward pass. The paper says the agent rewrote it to avoid atomic operations, cutting it from 32 ms to 14 ms, and that this delivered “a 25% improvement in end-to-end model training throughput”.
Go deeper: AMD made 12.4% of vLLM’s commits in a year · Siemens tuned a Claude chip agent to 95% in Nvidia NeMo Gym

Why Meta Provisions AMD
The paper says Meta runs a mixed fleet of Nvidia GPUs, AMD GPUs and its own MTIA chips “to reduce costs” and to limit its dependence on a single vendor. It states that models compatible with AMD GPUs “make up over 60% of production model types, weighted by resource footprint”.
On cost, the authors write that “The B200 keeps an edge on performance-per-watt”, but that power is a small share of capital-dominated total cost of ownership, “so the MI350Xโs lower TCO drives provisioning”. The paper gives no dollar prices for either chip.
It also says Meta has “successfully optimized LLM training on clusters of more than 2,000 MI350X GPUs”, with a fuller analysis of that work reserved for future research.
The Structural Read
As we read the paper, the switching cost it describes sits in code, not chips: it says “The emergence of agentic AI tools has fundamentally lowered the cost of switching from NVIDIA to AMD”.
As we read the kernel results, the average hides a per-model spread: the paper says its methods deliver up to 1.5x over the directly ported baseline, and Table III still shows six of ten models below B200 at matched batch sizes.
As we read the cost section, the paper ties provisioning to total cost of ownership rather than performance per watt: it says the B200 keeps the per-watt edge, and that the MI350X’s lower TCO drives provisioning.
Meta and AMD authors, arXiv 2610.22230
“These agents iteratively compile code, interpret error messages, and apply fixes until the build succeeds”
Three Implications
FOR NVIDIA The paper says models compatible with AMD GPUs make up over 60% of Meta’s production model types by resource footprint, and reports a 101.2% geometric mean for MI350X on its ten training workloads.
FOR AMD The paper reports GEMM performance as an area for improvement and six of ten models below B200 at matched batch sizes, alongside the 101.2% average.
FOR HYPERSCALER BUYERS The paper lists three reusable principles: co-design models for the target chip, select kernels with an analytical model, and use agentic workflows for porting and tuning; it says its contributions were upstreamed to PyTorch, Triton and ROCm.
The Business Engineer Lens
This story maps onto the Business Engineer framework The Agentic Harness War.
The analysis frames it in one line: “The load-bearing question: is the skill portable, or is it locked to a harness?”
As we read it, the Meta paper applies the same question one layer down: its agent workflow encodes tuning rules as reusable skills, and the paper reports they ported and tuned kernels across vendors. The framework was published in July 2026 and does not discuss this paper.
What Is Not Established
The results cover recommendation models, not large language models; the paper says a comprehensive analysis of LLM-specific performance is reserved for future work. The figures come from Meta and AMD authors and have not been independently reproduced; we did not rerun them.
An X post that drew attention to the paper on 30 October argued the parity came “under severe thermal constraints”. The paper itself describes using the MI350X’s power-excursion headroom to exceed steady-state limits; that framing is the poster’s reading, not the paper’s.
The Bottom Line
In a 15 October paper, Meta and AMD engineers report that AMD’s MI350X matched Nvidia’s B200 on average across ten production recommendation-model training jobs, at a 101.2% geometric mean. By our count from the paper’s table, MI350X was faster on 4 of the 10 and slower on 6, with ratios from 82% to 130%, and the paper credits AI agents with much of the CUDA porting work.
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A note on sourcing. Findings come from arXiv paper 2610.22230 by Meta and AMD authors (submitted 15 October 2026), read in full on 30 October 2026, and an X post by LiDaosen; we did not contact Meta, AMD or Nvidia and did not rerun the benchmarks. Figures labelled our arithmetic or our count are our own.
Sources: Meta and AMD authors, arXiv 2610.22230, 15 Oct 2026 · LiDaosen on X, 30 Oct 2026









