Micron Says AI Context Grows 30x a Year, Plans HBM6 by 2030

Micron said in a technology webinar on 21 October 2026 that AI context length is growing 30x per year, and put a new generation of high-bandwidth memory (HBM) on its roadmap for every year from 2026 to HBM6 in 2030. The figures come from the webinar’s slides; it was led by Scott DeBoer, Micron’s President and Chief Technology and Products Officer. Micron’s slides label the 30x figure “AI context length growth per year” under the heading “Agentic AI”.

The same day brought three more memory signals. Powerchip said it raised prices 23% last quarter and expects another 30% this quarter, the Taipei Times reported. South Korea’s chip exports rose 222.5% to $27.5 billion in the first 20 days of October, Yonhap reported, citing the Korea Customs Service. Reuters reported that Samsung and SK Hynix are upgrading their China NAND plants. As we read it, the signals point the same way: AI demand is being planned for years ahead, on a yearly product cadence.

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What Micron Showed

One slide, titled “Each wave of AI increases memory demand,” gives four multiples. Micron puts HBM per GPU up 3.6x from Nvidia’s H100 to its B300, citing Nvidia’s specifications of 80GB and 288GB. It gives 2x for memory per server in three years for inference and reasoning, 30x for AI context length growth per year for agentic AI, and more than 10x for DRAM in an L4+ robotaxi against today’s L2+ car.

The roadmap slide, titled “Product roadmap expands to custom HBM, vHBM and vEIM,” places HBM4 in 2026, HBM4E in 2027, HBM5 in 2028, HBM5E in 2029 and HBM6 in 2030. It describes HBM as “JEDEC + custom beginning with HBM4E”. Custom HBM, in plain terms, means memory whose base logic is designed together with a customer’s chip.

The same slide adds two new lines starting in 2028: vertical HBM, or vHBM, which Micron calls “Memory stacked on compute,” and vertical edge inference memory, vEIM, with vEIM 1 specified at 2 TB/s of bandwidth. Micron notes that product timing “represents targeted high-volume manufacturing” and that timing and performance targets are “directional and subject to change.”

On manufacturing, Micron said its 1δ DRAM node is “ramping in the second half of 2027,” and that its G11 NAND, with more than 400 layers, has a “Volume ramp in 2H 2027”. In its post on X, Micron said the webinar disclosed upcoming DRAM nodes publicly for the first time.

What Was Posted on X

Micron (@MicronTech) posted at 15:41 UTC on 21 October 2026 that Scott DeBoer, its President and Chief Technology and Products Officer, shared its most detailed look yet at the innovations shaping the next era of AI infrastructure in the day’s technology webinar, listing upcoming DRAM nodes disclosed publicly for the first time and two new HBM architectures. This piece embeds it as Micron’s own summary of the webinar.

Micron Is Not Following CXMT to 4F²

Nikkei Asia reported on 21 October that Micron “has no plans to move toward the 4F-squared memory technology despite Chinese rival CXMT’s recent announcement” on such a design, attributing the position to Micron’s chief technology officer in its headline. Micron’s own slide says the same thing: “Micron is extending 6F² leadership and developing 3D DRAM; not pursuing 4F² due to increased complexity/cost.”

In plain terms, 6F² and 4F² describe how much area one memory cell takes up, and a smaller cell fits more bits on a chip. Micron’s slide lists “Over two decades of 4F² technology investigation” and marks 4F² with “No viable scaling path”. Its path is to keep shrinking 6F² cells and then build DRAM upwards in layers, the way NAND moved to 3D in 2015.

Powerchip: Prices Up 23%, Another 30% Expected

Last quarter, Powerchip Semiconductor Manufacturing, a Taiwanese logic and memory chipmaker, raised prices by 23% from the previous quarter, and it expects another 30% increase this quarter, the Taipei Times reported. It is negotiating with customers to hike prices by a further 10 to 20 percent next year, citing persistent capacity constraints across the industry, and gross margin rose to 48% from 28% a quarter earlier.

The company tied the supply crunch to AI server buildouts that have spurred demand for HBM and squeezed mature DDR3 and DDR4 production. “As major memory makers aggressively reallocate capacity to HBM and exit mature DRAM, we expect supply tightness for customers,” president Martin Chu said. Chairman Brian Shieh said Micron had set a precedent by fully funding the equipment for a Taiwan packaging expansion through prepayments.

Korea’s Chip Exports and the China NAND Upgrades

Korea’s exports reached $61.6 billion in the 1 to 20 October period, and chip exports “vaulted 222.5 percent to $27.5 billion,” Yonhap reported, citing Korea Customs Service data. Chips made up 44.7 percent of Korea’s total exports, up 16.2 percentage points from a year earlier.

Reuters reported on 21 October that Samsung is converting its Xian plant to make 286-layer V9 NAND chips, aiming for 5,000 wafers a month in December and 40,000 wafers by December 2027, according to one person familiar. SK Hynix is looking to switch its Dalian facilities to NAND with 240 layers or more. Both companies told Reuters the upgrades were being done “in close consultation with Washington”.

The Memory Signals in One Table

Storage Makers Report Next

Western Digital reports its September-quarter results after the US market close on 22 October, and Seagate after the close on 27 October, according to Nasdaq’s earnings calendar.

Connecting the Coverage

Our Micron and Sandisk piece counted about $225 billion of memory sales under contract at the two companies, by our arithmetic from their filings and calls, with Micron’s remaining performance obligations at approximately $134 billion as of 3 September 2026. Our Kospi piece covered a Bank of America report, as summarised by two research outlets, putting Samsung at 3.0 times and SK Hynix at 2.7 times consensus 2027 earnings.

Our SK Hynix piece carried Yonhap’s Korea export figures and our summary of Reuters’ account of the China NAND upgrades, and our earlier SK Hynix selloff piece followed CXMT, China’s main DRAM maker, as it swung to a profit. Our iPhone Duo piece reported Apple warning of “limited” launch stock. As we read it, today’s Micron roadmap adds the supplier’s side: it plans products a year at a time out to 2030.

The Structural Read

As we read it, Micron’s roadmap ties memory to customers’ chip schedules: each HBM generation is dated a year apart to 2030, and the slides describe HBM as “JEDEC + custom beginning with HBM4E”.

As we read it, Powerchip’s numbers show the other side of the same shift: the Taipei Times reported that it tied its price rises to memory makers moving capacity to HBM and out of mature DRAM.

As we read it, the Korean figures show where the demand lands: chips made up 44.7 percent of Korea’s exports in the first 20 days of October, Yonhap reported, citing Korea Customs Service data.

Three Implications

FOR BUYERS OF MEMORY Powerchip said it would prioritize capacity allocation for customers under long-term supply agreements with fixed volumes and pricing, the Taipei Times reported.

FOR MICRON’S RIVALS Micron’s slide says it is not pursuing 4F² due to increased complexity/cost, while Nikkei Asia reported CXMT’s recent announcement on such a design.

FOR INVESTORS Western Digital reports on 22 October and Seagate on 27 October, according to Nasdaq’s earnings calendar; as we read it, these are the next first-party numbers on AI storage demand.

The Business Engineer Lens

This story maps onto the Business Engineer framework The AI Memory Chokepoint.

The framework puts it this way: “Memory is becoming the new compute. HBM growth is outpacing accelerator demand, making memory the rate-limiting factor in the AI scaling equation.”

As we read it, Micron’s 21 October roadmap is a supplier’s answer to that claim: an HBM generation each year to 2030, and memory stacked on compute from 2028. The framework was published in December 2025 and does not discuss this roadmap.

What Is Not Established

Micron’s roadmap dates are targets for high-volume manufacturing, which it calls directional and subject to change. The 30x context figure is Micron’s own, and its slides do not say how it was measured. We read Nikkei Asia’s headline and opening only, not the full interview. Powerchip’s price figures are its own prices, not market-wide memory prices. The Reuters account of the China plants rests on people familiar with the plans, and Reuters said it could not determine to what extent US authorities have granted export licences for the equipment needed.

The Bottom Line

Micron said on 21 October 2026 that AI context length is growing 30x per year, and dated a new HBM generation every year from HBM4 in 2026 to HBM6 in 2030, as targets it calls directional. Powerchip raised its prices 23% last quarter and expects 30% more this quarter, the Taipei Times reported, and Korea’s chip exports rose 222.5% in the first 20 days of October, Yonhap reported. Western Digital and Seagate report next, on 22 and 27 October.