NVIDIA said on 14 October 2026 that semiconductor companies including Applied Materials, Cadence, KLA, Lam Research, Siemens and Synopsys are adopting its CUDA-X libraries for what it calls AI-defined fabs, and it introduced cuPotential, a new library for simulating how atoms and molecules interact.
The release attributes speed-ups to named partners, the largest being approximately 85x faster probe-maintenance inference at Teradyne and a KLA image kernel 50x faster than earlier CPU versions. Each figure is measured against that partner’s own baseline, so they are not comparable with each other.
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The key insight: As we read it, NVIDIA is selling software into the tools that make chips: the release puts its CUDA-X libraries inside products from Synopsys, Cadence, Siemens, Lam Research, KLA and Applied Materials, the design, process and inspection layers of chipmaking, rather than only its GPUs.
What NVIDIA Announced
NVIDIA defines AI-defined fabs as semiconductor factories where AI helps engineers optimize processes, solve production issues and improve production efficiency.
The new library, cuPotential, adds GPU-accelerated functions for atomic-scale simulation that developers can add to existing software, and NVIDIA says it makes these modeling capabilities available to AI agents. In early-access testing, the release says, it accelerated already GPU-optimized workflows by an additional 2-3x. Synopsys is named among the early adopters.
“The semiconductor industry made the AI revolution possible. Now, AI is transforming how chips are built,” said Tim Costa, vice president and general manager of industrial and computational engineering at NVIDIA.

What Was Posted on X
NVIDIA’s @NVIDIAAIInfra account posted the announcement on 14 October 2026, naming Applied Materials, Cadence, KLA, Lam Research, Siemens and Synopsys as using its accelerated computing for AI-defined fabs and linking to the release this piece is built from.
Design and Simulation
The release says Synopsys is using cuPotential, cuEST and cuDSS, with early QuantumATK results showing a potential 30x speedup using cuEST and S-Device benchmarks showing a 12x speedup using cuDSS.
It says Cadence’s AuraStack AI Super Agent optimizes advanced packages for heat and stress 8x faster using cuDSS with Cadence Celsius, and that COMSOL is delivering up to 10x faster semiconductor multiphysics simulations with cuDSS.
Voltai’s Voltaire platform, the release says, compresses complex electro-thermal-mechanical simulation workflows from months to a day. ChipAgents is working with NVIDIA on Build-A-Chip Bench, a benchmark that evaluates agents across end-to-end workflows from specification to graphic data system.
Manufacturing Prep
Siemens is using NVIDIA’s cuLitho library to speed up its Calibre software for chip-pattern refinement and mask preparation, according to the release.
Lam Research intends to integrate NanoVDB into its SEMulator3D process modeling platform, which the release says is expected to accelerate select wafer-etch modeling by up to 30x. It adds that PhysicsNeMo has been demonstrated to assist in reducing plasma-prediction simulation time to as little as milliseconds instead of days.
Luminary, the release says, uses PhysicsNeMo to let engineers explore 100x more package designs in the same schedule.
Inspection and Test
The release says imec achieved a 30% improvement in the lithography process window using cuLitho, and that a new KLA NPP NCC kernel performed 50x faster than earlier CPU versions, comparable with KLA’s hand-tuned implementations.
Teradyne is using NPP, RAPIDS cuDF and CuPy to deliver approximately 85x faster probe-maintenance inference, according to the release, helping identify degrading probes before they affect yield. The release says Advantest is using NeMo Switchyard AI agents to streamline semiconductor test workflows and reduce response times from hours to minutes.
Fab Operations
Applied Materials is using Omniverse and CUDA-X libraries across materials discovery, process development and fab optimization, enabling up to 35x faster chamber simulations, the release says.
It also names Analog Devices, FANUC, Foxconn and OMRON for simulation, robotics digital twins and inspection agents, without speed-up figures for them.
Earlier today we reported that ASML expects its supply to trail 2027-28 demand, and that Salience Labs raised $125 million for optical switching chips for AI data centers.
What Is Available, and When
The release says cuPotential is available in early access, NanoVDB is available as open source within OpenVDB, and NPP is available through the NVIDIA CUDA Toolkit. Lam Research’s NanoVDB-accelerated SEMulator3D capability is targeted for release by the end of this year.
The Structural Read
As we read it, the partner list spans the whole fab: the release names companies in design and simulation, manufacturing prep, inspection and test, and fab operations.
As we read it, the numbers are vendor-stated and uneven: they run from 8x at Cadence to approximately 85x at Teradyne, each against a different baseline, and several are worded as ‘up to’, ‘potential’ or ‘expected’.
As we read it, the release ties the push to capacity: NVIDIA says that as demand for advanced chips rises, fabs must expand production while managing increasingly complex manufacturing processes.
Tim Costa, vice president and general manager of industrial and computational engineering, NVIDIA, 14 October 2026
“As fabs race to meet demand for advanced chips, NVIDIA CUDA-X and Omniverse libraries give AI agents accelerated simulation and inspection tools to help engineers manage complexity, improve yield and advance AI-defined fabs”
Three Implications
CHIP-TOOL VENDORS The release names Synopsys, Cadence, Siemens, Lam Research, KLA and Applied Materials as using NVIDIA libraries inside their own products and workflows.
FAB AND TEST ENGINEERS NVIDIA says cuPotential is in early access, NanoVDB is open source within OpenVDB and NPP ships in the CUDA Toolkit; Lam’s NanoVDB capability is targeted by the end of this year.
BUYERS WEIGHING THE CLAIMS The release gives no prices or contract values, and its speed-ups are measured against each partner’s own baseline.
The Business Engineer Lens
This story maps onto the Business Engineer framework The Nine Layers of AI.
The framework puts it this way: “It is a layered industrial stack — and at any given moment, the binding constraint sits at a different layer than it did six months ago.”
As we read it, NVIDIA’s release points at the manufacturing layer under the chips themselves: it pitches its libraries at how fabs model, inspect and run production as demand for advanced chips rises.

What Is Not Established
The speed-ups are stated in NVIDIA’s release about its partners; we did not see the partners’ own benchmark reports, and several are worded as ‘up to’, ‘potential’ or ‘expected’.
The release gives no prices, no contract values and no figures for how many fabs or production lines use the libraries.
The Bottom Line
NVIDIA said on 14 October 2026 that chip-industry companies are adopting its CUDA-X libraries for AI-defined fabs, introduced cuPotential in early access, and attributed speed-ups to partners ranging from 8x at Cadence to approximately 85x at Teradyne.
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A note on sourcing. On 14 October 2026 we read NVIDIA’s press release of the same day in full on its newsroom, and NVIDIA’s post on X. The speed-ups are the release’s statements about named partners; we did not see the partners’ own benchmark reports, and they are measured against different baselines. Nothing here is investment advice.
Sources: NVIDIA Newsroom: NVIDIA and Semiconductor Leaders Advance AI Across Chip Design and Manufacturing for AI-Defined Fabs, 14 Oct 2026 · @NVIDIAAIInfra on X, 14 Oct 2026









